PICMG has ratified the MicroTCA.0 specification Revision 3.0. This latest release improves system performance by defining 100 GbE and PCIe Gen 5 fabrics, addressing urgent bandwidth needs. It enhances platform thermal design power (TDP) and allows for higher-performance processors.
The update, which paves the way for next-gen MicroTCA proofs of concept, addresses the demands of applications such as AI, defence, wireless communication, and quantum computing. The revision also signals the continued adoption by global commercial, scientific, and defence organisations.
- PICMG has ratified Revision 3.0 of the MicroTCA.0 (µTCA.0) specification, addressing urgent bandwidth requirements and expanding platform thermal design power.
- The new release enables the use of higher-performance processors and provides more power per slot for higher transfer rates within µTCA chassis and to external systems and server clusters.
- Revision 3.0 of the µTCA.0 specification lays the foundation for building next-generation MicroTCA proofs of concept and is supported by a range of compliant building blocks and solutions from various vendors.
Boosting Bandwidth with MicroTCA 3.0
Pressing bandwidth needs are about to get a major boost. PICMG, a significant player in the development of open embedded computing specifications, has ratified Revision 3.0 of the MicroTCA.0 (µTCA.0) specification. This fresh release addresses urgent bandwidth requirements by establishing 100 GbE and PCIe Gen 5 fabrics, which amp up system performance by a factor of four.
More Than Just Speed
But it’s not just about speed. The new specification also expands platform thermal design power (TDP), enabling the use of higher-performance processors. This means users now have a wider selection of specification-compliant building blocks and solutions, allowing more power per slot for higher transfer rates within µTCA chassis and external systems and server clusters.
Building Blocks for the Future
This exciting update lays the groundwork for constructing next-generation MicroTCA proofs of concept. It’s a solution tailored to the current and future demands of applications like machine vision, artificial intelligence, defence, research, instrumentation, and wireless communication. Even emerging applications like quantum computing can benefit from this update.
“Revision 3 of MTCA.0 addresses urgent requirements and thus enables companies to now provide specification-compliant solutions rather than proprietary or custom approaches,” says Heiko Korte of NAT Europe and lead of PICMG’s MicroTCA Technical Working Group.
New Solutions Coming Soon
MicroTCA.0 Revision 3.0-compliant solutions will hit shelves soon. These will include chassis, MicroTCA Carrier Hub (MCH), Advanced Mezzanine Card (AMC), Rear Transition Module (RTM), and power modules (PM) products from a variety of vendors including VadaTech, NAT, AIES Sp z o.o., nVent SCHROFF, and others.
Final Thoughts
The ratification of Revision 3.0 of the MicroTCA specification is a major step forward in addressing bandwidth needs. It not only boosts system performance but also expands thermal design power, enabling more powerful processors. With new building blocks and solutions in the pipeline, it’s clear that this update will play a significant role in shaping the future of embedded computing.
The commitment of vendors to continue developing µTCA products, coupled with increased interest from emerging fields like quantum computing, ensures a vibrant lifecycle for the open computing specification for the foreseeable future.
FAQ
Q: What is the MicroTCA.0 (µTCA.0) specification Revision 3.0?
A: Revision 3.0 of the MicroTCA.0 (µTCA.0) specification is the latest release by PICMG, a leading consortium for open embedded computing specifications. It addresses urgent bandwidth requirements and introduces 100 GbE and PCIe Gen 5 fabrics, improving system performance by 4x. It also expands platform thermal design power (TDP), allowing for the use of higher-performance processors.
Q: What are the benefits of the new MicroTCA.0 Revision 3.0 specification?
A: The new MicroTCA.0 Revision 3.0 specification allows more power per slot, enabling higher transfer rates within µTCA chassis and external systems and server clusters. It also lays the foundation for building next-generation MicroTCA proofs of concept. The specification addresses the demands of applications like machine vision, AI, defence, research, instrumentation, wireless communication, and emerging applications such as quantum computing.
Q: Why is the new MicroTCA.0 Revision 3.0 specification important?
A: The new specification enables companies to provide specification-compliant solutions rather than proprietary or custom approaches. It has been developed through collaboration with a broad spectrum of participants, ensuring that all agenda items were reviewed from different angles and properly discussed. The strong interest in making these changes part of an open specification is evident from the number of MicroTCA ecosystem suppliers that have joined the working group.
Q: Which companies are offering MicroTCA.0 Revision 3.0-compliant solutions?
A: Companies such as VadaTech, NAT, AIES Sp z o.o., nVent SCHROFF, and others will be offering MicroTCA.0 Revision 3.0-compliant solutions shortly. These include chassis, MicroTCA Carrier Hub (MCH), Advanced Mezzanine Card (AMC), Rear Transition Module (RTM), and power modules (PM) products. The commitment of existing vendors to the development of µTCA products is joined by increased interest from players in emerging fields like quantum computing.
Q: What is the outlook for the MicroTCA.0 specification?
A: The release of MicroTCA.0 Revision 3.0 secures the continued adoption of the standard by commercial, scientific, and defence organizations around the world. With the commitment of existing vendors and increased interest from players in emerging fields, the future of the open computing specification looks promising for years to come.